A Buffer Management for STT-MRAM based Hybrid Main Memory in Sensor Nodes
نویسندگان
چکیده
* This research was supported by Basic Science Research Program through the National Research Foundation of Korea(NRF) funded by the Ministry of Education, Science and Technology(2010-0021897). Abstract As the power dissipation has become one of the critical design challenges in a sensor network environment, nonvolatile memories such as STT-MRAM and flash memory will be used in the next generation sensor nodes. In this paper, we studied an efficient buffer management scheme considering the write limitation of STT-MRAM based main memory as well as the erase-before-write limitation of flash memory for storage device. The goal of proposed scheme is to minimize the number of write operations on STTMRAM as well as the number of erase operations on flash memory. We showed through simulation that proposed scheme outperforms legacy buffer management schemes. Index Terms – Non-volatile memories, Low power, Buffer management, STT-MRAM, NAND flash memory.
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